Parity Generators and Checkers

Devices in the parity generator and checker logic family are component-level devices used to evaluate the number of bits in a digital word that are set to 1, and generate (or evaluate) an additional parity bit which indicates whether the number of bits in the word set to 1 is even or odd. This function is commonly used as a simple means of detecting data errors that may have been introduced during transmission.

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Texas Instruments SN74AS286D

IC 9-BIT GEN/CHKER 14SOIC

2.78

Texas Instruments SN74AS286NG4

IC 9-BIT GEN/CHKER 14DIP

2.52

Texas Instruments SN74AS286N

IC 9-BIT GEN/CHKER 14DIP

2.52

Texas Instruments CD74AC280E

IC 9-BIT GEN/CHKER 14DIP

0.91

Texas Instruments CD74ACT280M

IC 9-BIT GEN/CHKER 14SOIC

0.56

Texas Instruments SN74LS280D

IC 9-BIT GEN/CHKER 14SOIC

0.83

Texas Instruments CD74ACT280E

IC 9-BIT GEN/CHKER 14DIP

0.56

Texas Instruments SN74LS280NSR

IC 9-BIT GEN/CHKER 14SO

0