Parity Generators and Checkers

Devices in the parity generator and checker logic family are component-level devices used to evaluate the number of bits in a digital word that are set to 1, and generate (or evaluate) an additional parity bit which indicates whether the number of bits in the word set to 1 is even or odd. This function is commonly used as a simple means of detecting data errors that may have been introduced during transmission.

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Microchip Technology SY10E160JZ TR

IC 12-BIT GEN/CHKER 28PLCC

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Microchip Technology SY10E160JZ

IC 12-BIT GEN/CHKER 28PLCC

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Microchip Technology SY100S360JZ-TR

IC 8-BIT GEN/CHKER 28PLCC

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Microchip Technology SY100S360JZ

IC 8-BIT GEN/CHKER 28PLCC

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Microchip Technology SY100E193JZ TR

IC 8-BIT GENERATOR 28PLCC

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Microchip Technology SY100E193JZ

IC 8-BIT GENERATOR 28PLCC

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Microchip Technology SY100E160JZ TR

IC 12-BIT GEN/CHKER 28PLCC

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Microchip Technology SY100E160JZ

IC 12-BIT GEN/CHKER 28PLCC

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